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SubjectRe: [PATCH v2 05/19] PM / devfreq: tegra: Replace write memory barrier with the read barrier
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Hi,

On 19. 4. 15. 오후 11:54, Dmitry Osipenko wrote:
> The write memory barrier isn't needed because the BUS buffer is flushed
> by read after write that happens after the removed wmb(), we will also
> use readl() instead of the relaxed version to ensure that read is indeed
> completed.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> drivers/devfreq/tegra-devfreq.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/devfreq/tegra-devfreq.c b/drivers/devfreq/tegra-devfreq.c
> index d62fb1b0d9bb..f0f0d78f6cbf 100644
> --- a/drivers/devfreq/tegra-devfreq.c
> +++ b/drivers/devfreq/tegra-devfreq.c
> @@ -243,8 +243,7 @@ static void tegra_devfreq_update_wmark(struct tegra_devfreq *tegra,
> static void actmon_write_barrier(struct tegra_devfreq *tegra)
> {
> /* ensure the update has reached the ACTMON */
> - wmb();
> - actmon_readl(tegra, ACTMON_GLB_STATUS);
> + readl(tegra->regs + ACTMON_GLB_STATUS);

I think that this meaning of actmon_write_barrier() keeps
the order of 'store' assembly command without the execution change
from compiler optimization by using the wmb().

But, this patch edits it as following:
The result of the following two cases are same?

[original code]
wmb()
read_relaxed()

[new code by this patch]
readl_relaxed()
rmb()


> }
>
> static void actmon_isr_device(struct tegra_devfreq *tegra,
>


--
Best Regards,
Chanwoo Choi
Samsung Electronics

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