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SubjectRe: [PATCH] KVM: nVMX: always use early vmcs check when EPT is disabled
On Mon, Apr 15, 2019 at 04:05:56PM +0200, Paolo Bonzini wrote:
> The remaining failures of vmx.flat when EPT is disabled are caused by
> incorrectly reflecting VMfails to the L1 hypervisor. What happens is
> that nested_vmx_restore_host_state corrupts the guest CR3, reloading it
> with the host's shadow CR3 instead, because it blindly loads GUEST_CR3
> from the vmcs01.
>
> For simplicity let's just always use hardware VMCS checks when EPT is
> disabled. This way, nested_vmx_restore_host_state is not reached at
> all (or at least shouldn't be reached).

At the risk of getting too clever, we can handle this scenario by stashing
L1's CR3 in vmcs01.GUEST_CR3 immediately prior to loading L2's state.

The attached patch passes vmx.flat with ept=0, haven't tested it beyond
that.

Side topic, your patch was missing your SOB.
From 32ee6be1ba6490c59db6843b2f88e18539a49961 Mon Sep 17 00:00:00 2001
From: Sean Christopherson <sean.j.christopherson@intel.com>
Date: Mon, 15 Apr 2019 10:06:22 -0700
Subject: [PATCH] KVM: nVMX: Stash L1's CR3 in vmcs01.GUEST_CR3 on nested entry
w/o EPT

KVM does not have 100% coverage of VMX consistency checks, i.e. some
checks that cause VM-Fail may only be detected by hardware during a
nested VM-Entry. In such a case, KVM must restore L1's state to the
pre-VM-Enter state as L2's state has already been loaded into KVM's
software model.

L1's CR3 and PDPTRs in particular are loaded from vmcs01.GUEST_*. But
when EPT is disabled, the associated fields hold KVM's shadow values,
not L1's "real" values. Fortunately, when EPT is disabled the PDPTRs
come from memory, i.e. are not cached in the VMCS. Which leaves CR3
as the sole anomaly. Handle CR3 by overwriting vmcs01.GUEST_CR3 with
L1's CR3 during the nested VM-Entry when EPT is disabled *and* nested
early checks are disabled, so that nested_vmx_restore_host_state() will
naturally restore the correct vcpu->arch.cr3 from vmcs01.GUEST_CR3.

Note, these shenanigans work because nested_vmx_restore_host_state()
does a full kvm_mmu_reset_context(), i.e. unloads the current MMU,
which guarantees vmcs01.GUEST_CR3 will be rewritten with a new shadow
CR3 prior to re-entering L1. Writing vmcs01.GUEST_CR3 is done if and
only if nested early checks are disabled as "late" VM-Fail should never
happen in that case (KVM WARNs), and the conditional write avoids the
need to restore the correct GUEST_CR3 when nested_vmx_check_vmentry_hw()
fails.

Reported-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
---
arch/x86/kvm/vmx/nested.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index e5418f78a249..b974d2116f9e 100644
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -2982,6 +2982,8 @@ int nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu, bool from_vmentry)
if (kvm_mpx_supported() &&
!(vmcs12->vm_entry_controls & VM_ENTRY_LOAD_BNDCFGS))
vmx->nested.vmcs01_guest_bndcfgs = vmcs_read64(GUEST_BNDCFGS);
+ if (!enable_ept)
+ vmcs_writel(GUEST_CR3, vcpu->arch.cr3);

vmx_switch_vmcs(vcpu, &vmx->nested.vmcs02);

@@ -3802,7 +3804,8 @@ static void nested_vmx_restore_host_state(struct kvm_vcpu *vcpu)
* VMFail, like everything else we just need to ensure our
* software model is up-to-date.
*/
- ept_save_pdptrs(vcpu);
+ if (enable_ept)
+ ept_save_pdptrs(vcpu);

kvm_mmu_reset_context(vcpu);

--
2.21.0
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