lkml.org 
[lkml]   [2019]   [Apr]   [1]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [patch 04/14] x86/exceptions: Make IST index zero based
On Sun, Mar 31, 2019 at 11:40:24PM +0200, Thomas Gleixner wrote:
> --- a/arch/x86/include/asm/page_64_types.h
> +++ b/arch/x86/include/asm/page_64_types.h
> @@ -25,11 +25,14 @@
> #define IRQ_STACK_ORDER (2 + KASAN_STACK_ORDER)
> #define IRQ_STACK_SIZE (PAGE_SIZE << IRQ_STACK_ORDER)
>
> -#define DOUBLEFAULT_STACK 1
> -#define NMI_STACK 2
> -#define DEBUG_STACK 3
> -#define MCE_STACK 4
> -#define N_EXCEPTION_STACKS 4 /* hw limit: 7 */
> +/*
> + * The index for the tss.ist[] array. The hardware limit is 7 entries.
> + */
> +#define DOUBLEFAULT_IST 0
> +#define NMI_IST 1
> +#define DEBUG_IST 2
> +#define MCE_IST 3
> +#define N_EXCEPTION_STACKS 4

Would it make sense to use an enum here?

\
 
 \ /
  Last update: 2019-04-01 09:30    [W:0.157 / U:6.384 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site