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Subject[PATCH v2 1/2] clk:Fix divide-by-zero in divider_ro_round_rate_parent
Date
In the function divider_recalc_rate() The judgment of the return value of
_get_div() indicates that the return value of _get_div() may be 0.
In order to avoid the divide-by-zero error, add check the return value
of _get_div() in the divider_ro_round_rate_parent()

Signed-off-by: nixiaoming <nixiaoming@huawei.com>
---
drivers/clk/clk-divider.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index e5a1726..f4bf7a4 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -347,6 +347,9 @@ long divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent,
int div;

div = _get_div(table, val, flags, width);
+ /* avoid divide-by-zero */
+ if (!div)
+ return -EINVAL;

/* Even a read-only clock can propagate a rate change */
if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
--
1.8.5.6
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