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Subject[PATCH v13 0/4] PM / Domains: Support hierarchical CPU arrangement (PSCI/ARM)
Changes in v13:
- Use WRITE|READ_ONCE when reading/writing the "next_hrtimer" variable in the
struct cpuidle_device. Also reset the same variable after resumed from idle to
avoid it from containing a stale value.
- Added acks from Daniel Lezcano.
- The entire v13 series, including the PSCI/ARM changes are available in a
git branch [3].

Changes in v12:
- Drop the patches for restructuring tick_nohz_get_sleep_length(). Instead
replace them all with a new timer/cpuidle patch, according to suggestions by
- The entire v12 series, including the PSCI/ARM changes are available in a
git branch [2].

Changes in v11:
- This version contains only the infrastructure changes that is needed for
deployment. The PSCI/ARM changes have also been updated and tested, but I will
post them separately. Still, to provide completeness, I have published a branch
containing everything to a git tree [1], feel free to have a look and test.
- The v10 series contained a patch, "timer: Export next wakeup time of a CPU",
which has been replaced by a couple of new patches, whom reworks the existing
tick_nohz_get_sleep_length() function, to provide the next timer expiration
instead of the duration.
- More changelogs are available per patch.

Changes in v10:
- Quite significant changes have been to the PSCI driver deployment. According
to an agreement with Lorenzo, the hierarchical CPU layout for PSCI should be
orthogonal to whether the PSCI FW supports OSI or not. This has been taken
care of in this version.
- Drop the generic attach/detach helpers of CPUs to genpd, instead make that
related code internal to PSCI, for now.
- Fix "BUG: sleeping for invalid context" for hotplug, as reported by Raju.
- Addressed various comments from version 8 and 9.
- Clarified changelogs and re-wrote the cover-letter to better explain the
motivations behind these changes.


For ARM64/ARM based platforms CPUs are often arranged in a hierarchical manner.
From a CPU idle state perspective, this means some states may be shared among a
group of CPUs (aka CPU cluster).

To deal with idle management of a group of CPUs, sometimes the kernel needs to
be involved to manage the last-man standing algorithm, simply because it can't
rely solely on power management FWs to deal with this. Depending on the
platform, of course.

There are a couple of typical scenarios for when the kernel needs to be in
control, dealing with synchronization of when the last CPU in a cluster is about
to enter a deep idle state.

The kernel needs to carry out so called last-man activities before the
CPU cluster can enter a deep idle state. This may for example involve to
configure external logics for wakeups, as the GIC may no longer be functional
once a deep cluster idle state have been entered. Likewise, these operations
may need to be restored, when the first CPU wakes up.

Other more generic I/O devices, such as an MMC controller for example, may be a
part of the same power domain as the CPU cluster, due to a shared power-rail.
For these scenarios, when the MMC controller is in use dealing with an MMC
request, a deeper idle state of the CPU cluster may needs to be temporarily
disabled. This is needed to retain the MMC controller in a functional state,
else it may loose its register-context in the middle of serving a request.

In this series, we are extending the generic PM domain (aka genpd) to be used
for also CPU devices. Hence the goal is to re-use much of its current code to
help us manage the last-man standing synchronization. Moreover, as we already
use genpd to model power domains for generic I/O devices, both 1) and 2) can be
address with its help.

Moreover, to address these problems for ARM64 DT based platforms, we are
deploying support for genpd and runtime PM to the PSCI FW driver - and finally
we make some updates to two ARM64 DTBs, as to deploy the new PSCI CPU topology

The series has been tested on a Qcom 410c dragonboard and on a Hisilicon Hikey
board. The first one uses PSCI OS-initiated mode, while the second uses the PSCI
Platform-Coordinated mode.

Kind regards
Ulf Hansson

[1] next_v11
[2] next_v12
[2] next_v13

Ulf Hansson (4):
PM / Domains: Add a generic data pointer to the genpd_power_state
PM / Domains: Add support for CPU devices to genpd
cpuidle: Export the next timer/tick expiration for a CPU
PM / Domains: Add genpd governor for CPUs

drivers/base/power/domain.c | 77 ++++++++++++++++++++++++++--
drivers/base/power/domain_governor.c | 65 ++++++++++++++++++++++-
drivers/cpuidle/cpuidle.c | 19 ++++++-
include/linux/cpuidle.h | 1 +
include/linux/pm_domain.h | 20 +++++++-
include/linux/tick.h | 7 ++-
kernel/time/tick-sched.c | 12 +++++
7 files changed, 193 insertions(+), 8 deletions(-)


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