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    Subject[PATCH v2 20/25] drm/mediatek: add ovl0/ovl0_2l usecase
    Date
    From: Yongqiang Niu <yongqiang.niu@mediatek.com>

    This patch add ovl0/ovl0_2l usecase
    in ovl->ovl0_2l direct link usecase:
    1. the crtc support layer number will 4+2
    2. ovl0_2l background color input select ovl0 when crtc init
    and disable it when crtc finish
    3. config ovl0_2l layer, if crtc config layer number is
    bigger than ovl0 support layers(max is 4)

    Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
    ---
    drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 38 +++++++++++++++++++++++++++++++--
    1 file changed, 36 insertions(+), 2 deletions(-)

    diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
    index 11e3404..0f97ee3 100644
    --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
    +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
    @@ -283,6 +283,13 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)

    for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
    struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i];
    + enum mtk_ddp_comp_id prev;
    +
    + if (i > 0)
    + prev = mtk_crtc->ddp_comp[i - 1]->id;
    + else
    + prev = DDP_COMPONENT_ID_MAX;
    + mtk_ddp_comp_bgclr_in_on(comp, prev);

    mtk_ddp_comp_config(comp, width, height, vrefresh, bpc);
    mtk_ddp_comp_start(comp);
    @@ -292,9 +299,18 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)
    for (i = 0; i < mtk_crtc->layer_nr; i++) {
    struct drm_plane *plane = &mtk_crtc->planes[i];
    struct mtk_plane_state *plane_state;
    + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
    + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp);
    + unsigned int local_layer;

    plane_state = to_mtk_plane_state(plane->state);
    - mtk_ddp_comp_layer_config(mtk_crtc->ddp_comp[0], i,
    +
    + if (i >= comp_layer_nr) {
    + comp = mtk_crtc->ddp_comp[1];
    + local_layer = i - comp_layer_nr;
    + } else
    + local_layer = i;
    + mtk_ddp_comp_layer_config(comp , local_layer,
    plane_state);
    }

    @@ -320,6 +336,7 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc)
    mtk_crtc->ddp_comp[i]->id);
    mtk_disp_mutex_disable(mtk_crtc->mutex);
    for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {
    + mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]);
    mtk_ddp_remove_comp_from_path(mtk_crtc->config_regs,
    mtk_crtc->mmsys_reg_data,
    mtk_crtc->ddp_comp[i]->id,
    @@ -340,6 +357,8 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
    struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state);
    struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
    unsigned int i;
    + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp);
    + unsigned int local_layer;

    /*
    * TODO: instead of updating the registers here, we should prepare
    @@ -362,7 +381,14 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
    plane_state = to_mtk_plane_state(plane->state);

    if (plane_state->pending.config) {
    - mtk_ddp_comp_layer_config(comp, i, plane_state);
    + if (i >= comp_layer_nr) {
    + comp = mtk_crtc->ddp_comp[1];
    + local_layer = i - comp_layer_nr;
    + } else
    + local_layer = i;
    +
    + mtk_ddp_comp_layer_config(comp, local_layer,
    + plane_state);
    plane_state->pending.config = false;
    }
    }
    @@ -604,6 +630,14 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
    }

    mtk_crtc->layer_nr = mtk_ddp_comp_layer_nr(mtk_crtc->ddp_comp[0]);
    + if (mtk_crtc->ddp_comp_nr > 1) {
    + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[1];
    + enum mtk_ddp_comp_type comp_type;
    +
    + comp_type = mtk_ddp_comp_get_type(comp->id);
    + if (comp_type == MTK_DISP_OVL || comp_type == MTK_DISP_OVL_2L)
    + mtk_crtc->layer_nr += mtk_ddp_comp_layer_nr(comp);
    + }
    mtk_crtc->planes = devm_kcalloc(dev, mtk_crtc->layer_nr,
    sizeof(struct drm_plane),
    GFP_KERNEL);
    --
    1.8.1.1.dirty
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