Messages in this thread | | | Subject | Re: [PATCH 2/2] PM / arch: x86: MSR_IA32_ENERGY_PERF_BIAS sysfs interface | From | Hannes Reinecke <> | Date | Fri, 22 Mar 2019 10:03:57 +0100 |
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On 3/21/19 11:20 PM, Rafael J. Wysocki wrote: > From: Rafael J. Wysocki <rafael.j.wysocki@intel.com> > > The Performance and Energy Bias Hint (EPB) is expected to be set by > user space through the generic MSR interface, but that interface is > not particularly nice and there are security concerns regarding it, > so it is not always available. > > For this reason, add a sysfs interface for reading and updating the > EPB, in the form of a new attribute, energy_perf_bias, located > under /sys/devices/system/cpu/cpu#/power/ for online CPUs that > support the EPB feature. > > Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> > --- > Documentation/ABI/testing/sysfs-devices-system-cpu | 18 ++++ > Documentation/admin-guide/pm/intel_epb.rst | 27 ++++++ > arch/x86/kernel/cpu/intel_epb.c | 93 ++++++++++++++++++++- > 3 files changed, 134 insertions(+), 4 deletions(-) > Reviewed-by: Hannes Reinecke <hare@suse.com>
Cheers,
Hannes -- Dr. Hannes Reinecke Teamlead Storage & Networking hare@suse.de +49 911 74053 688 SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg GF: Felix Imendörffer, Mary Higgins, Sri Rasiah HRB 21284 (AG Nürnberg)
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