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Subject[RFC PATCH 4/8] svm: Add AMD AVIC handlers for APIC ID, DFR and LDR update
Date
During AVIC temporary deactivation, guest could update APIC ID,
DFR and LDR registers, which would not be trapped by
avic_unaccelerated_ccess_interception(). In this case, we need
to update the AVIC logical APIC ID table accordingly.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
arch/x86/kvm/svm.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 75508f665aef..c33f02b4a19e 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -4649,6 +4649,24 @@ static void avic_handle_dfr_update(struct kvm_vcpu *vcpu)
svm->dfr_reg = dfr;
}

+static void svm_hwapic_ldr_update(struct kvm_vcpu *vcpu)
+{
+ if (svm_get_enable_apicv(vcpu) && !kvm_vcpu_apicv_active(vcpu))
+ avic_handle_ldr_update(vcpu);
+}
+
+static void svm_hwapic_apic_id_update(struct kvm_vcpu *vcpu)
+{
+ if (svm_get_enable_apicv(vcpu) && !kvm_vcpu_apicv_active(vcpu))
+ avic_handle_apic_id_update(vcpu);
+}
+
+static void svm_hwapic_dfr_update(struct kvm_vcpu *vcpu)
+{
+ if (svm_get_enable_apicv(vcpu) && !kvm_vcpu_apicv_active(vcpu))
+ avic_handle_dfr_update(vcpu);
+}
+
static int avic_unaccel_trap_write(struct vcpu_svm *svm)
{
struct kvm_lapic *apic = svm->vcpu.arch.apic;
@@ -7166,6 +7184,9 @@ static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
.load_eoi_exitmap = svm_load_eoi_exitmap,
.hwapic_irr_update = svm_hwapic_irr_update,
.hwapic_isr_update = svm_hwapic_isr_update,
+ .hwapic_apic_id_update = svm_hwapic_apic_id_update,
+ .hwapic_dfr_update = svm_hwapic_dfr_update,
+ .hwapic_ldr_update = svm_hwapic_ldr_update,
.sync_pir_to_irr = kvm_lapic_find_highest_irr,
.apicv_post_state_restore = avic_post_state_restore,

--
2.17.1
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