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    SubjectRe: [PATCH] mtd: spi-nor: cadence-quadspi: write upto 8-bytes data in STIG mode
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    Hi,

    On 03/02/19 5:50 PM, Tudor.Ambarus@microchip.com wrote:
    > + Vignesh
    >

    Thanks for looping in.

    > On 01/28/2019 07:02 AM, Purna Chandra Mandal wrote:
    >> cadence-quadspi controller allows upto eight bytes of data to
    >> be written in software Triggered Instruction generator (STIG) mode
    >> of operation. Lower 4 bytes are written through writedatalower and
    >> upper 4 bytes by writedataupper register.
    >>
    >> This patch allows all the 8 bytes to be written.
    >>

    Code as such looks fine. But, how was this tested? How can I trigger
    this new code path with current linux-next? AFAICS, STIG mode write is
    used to in nor->write_reg() path, and I dont see any nor->write_reg()
    call with >4bytes len.

    >> Signed-off-by: Purna Chandra Mandal <purna.chandra.mandal@intel.com>
    >
    > Looks good for me:
    > Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
    >
    > Vignesh, can we have your R-b or T-b tag?
    >
    > Cheers,
    > ta
    >
    >> ---
    >>
    >> drivers/mtd/spi-nor/cadence-quadspi.c | 15 ++++++++++++---
    >> 1 file changed, 12 insertions(+), 3 deletions(-)
    >>
    >> diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c
    >> index 04cedd3a2bf6..7f78f9409ddd 100644
    >> --- a/drivers/mtd/spi-nor/cadence-quadspi.c
    >> +++ b/drivers/mtd/spi-nor/cadence-quadspi.c
    >> @@ -418,9 +418,10 @@ static int cqspi_command_write(struct spi_nor *nor, const u8 opcode,
    >> void __iomem *reg_base = cqspi->iobase;
    >> unsigned int reg;
    >> unsigned int data;
    >> + u32 write_len;
    >> int ret;
    >>
    >> - if (n_tx > 4 || (n_tx && !txbuf)) {
    >> + if (n_tx > CQSPI_STIG_DATA_LEN_MAX || (n_tx && !txbuf)) {
    >> dev_err(nor->dev,
    >> "Invalid input argument, cmdlen %d txbuf 0x%p\n",
    >> n_tx, txbuf);
    >> @@ -433,10 +434,18 @@ static int cqspi_command_write(struct spi_nor *nor, const u8 opcode,
    >> reg |= ((n_tx - 1) & CQSPI_REG_CMDCTRL_WR_BYTES_MASK)
    >> << CQSPI_REG_CMDCTRL_WR_BYTES_LSB;
    >> data = 0;
    >> - memcpy(&data, txbuf, n_tx);
    >> + write_len = (n_tx > 4) ? 4 : n_tx;
    >> + memcpy(&data, txbuf, write_len);
    >> + txbuf += write_len;
    >> writel(data, reg_base + CQSPI_REG_CMDWRITEDATALOWER);
    >> - }
    >>
    >> + if (n_tx > 4) {
    >> + data = 0;
    >> + write_len = n_tx - 4;
    >> + memcpy(&data, txbuf, write_len);
    >> + writel(data, reg_base + CQSPI_REG_CMDWRITEDATAUPPER);
    >> + }
    >> + }
    >> ret = cqspi_exec_flash_cmd(cqspi, reg);
    >> return ret;
    >> }
    >>

    --
    Regards
    Vignesh

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