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    SubjectRe: [PATCH 1/2] extcon-intel-cht-wc: Make charger detection co-existed with OTG host mode
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    Hi,

    On 10-02-19 21:36, Yauhen Kharuzhy wrote:
    > Whiskey Cove Cherry Trail PMIC requires disabling OTG host mode before
    > of charger detection procedure. Do this by manipulationg of CHGRCTRL1
    > register.
    >
    > Source: APCI DSDT code of Lenovo Yoga Book YB1-X91L and open-sourced
    > Intel's drivers.
    >
    > Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>

    Ok, so this patch should work fine on the existing cht-wc using devices
    I am aware of; and otherwise looks good to:

    Reviewed-by: Hans de Goede <hdegoede@redhat.com>

    Regards,

    Hans



    > ---
    > drivers/extcon/extcon-intel-cht-wc.c | 38 +++++++++++++++++++++++++++-
    > 1 file changed, 37 insertions(+), 1 deletion(-)
    >
    > diff --git a/drivers/extcon/extcon-intel-cht-wc.c b/drivers/extcon/extcon-intel-cht-wc.c
    > index 5ef215297101..4f6ba249bc30 100644
    > --- a/drivers/extcon/extcon-intel-cht-wc.c
    > +++ b/drivers/extcon/extcon-intel-cht-wc.c
    > @@ -29,7 +29,16 @@
    > #define CHT_WC_CHGRCTRL0_DBPOFF BIT(6)
    > #define CHT_WC_CHGRCTRL0_CHR_WDT_NOKICK BIT(7)
    >
    > -#define CHT_WC_CHGRCTRL1 0x5e17
    > +#define CHT_WC_CHGRCTRL1 0x5e17
    > +#define CHT_WC_CHGRCTRL1_DBPEN_MASK BIT(7)
    > +#define CHT_WC_CHGRCTRL1_OTGMODE BIT(6)
    > +#define CHT_WC_CHGRCTRL1_FTEMP_EVENT BIT(5)
    > +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_1500 BIT(4)
    > +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_900 BIT(3)
    > +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_500 BIT(2)
    > +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_150 BIT(1)
    > +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_100 BIT(0)
    > +
    >
    > #define CHT_WC_USBSRC 0x5e29
    > #define CHT_WC_USBSRC_STS_MASK GENMASK(1, 0)
    > @@ -198,6 +207,29 @@ static void cht_wc_extcon_set_5v_boost(struct cht_wc_extcon_data *ext,
    > dev_err(ext->dev, "Error writing Vbus GPIO CTLO: %d\n", ret);
    > }
    >
    > +static void cht_wc_extcon_set_otgmode(struct cht_wc_extcon_data *ext,
    > + bool enable)
    > +{
    > + unsigned int chgrctrl1;
    > + int ret;
    > +
    > + ret = regmap_read(ext->regmap, CHT_WC_CHGRCTRL1, &chgrctrl1);
    > + if (ret) {
    > + dev_err(ext->dev, "Error reading CHGRCTRL1 reg: %d\n", ret);
    > + return;
    > + }
    > +
    > + if (enable)
    > + chgrctrl1 |= CHT_WC_CHGRCTRL1_OTGMODE;
    > + else
    > + chgrctrl1 &= ~(CHT_WC_CHGRCTRL1_OTGMODE);
    > +
    > + ret = regmap_write(ext->regmap, CHT_WC_CHGRCTRL1, chgrctrl1);
    > + if (ret)
    > + dev_err(ext->dev,
    > + "Error writing CHGRCTRL1 OTG mode bit: %d\n", ret);
    > +}
    > +
    > /* Small helper to sync EXTCON_CHG_USB_SDP and EXTCON_USB state */
    > static void cht_wc_extcon_set_state(struct cht_wc_extcon_data *ext,
    > unsigned int cable, bool state)
    > @@ -222,10 +254,14 @@ static void cht_wc_extcon_pwrsrc_event(struct cht_wc_extcon_data *ext)
    >
    > id = cht_wc_extcon_get_id(ext, pwrsrc_sts);
    > if (id == USB_ID_GND) {
    > + cht_wc_extcon_set_otgmode(ext, true);
    > +
    > /* The 5v boost causes a false VBUS / SDP detect, skip */
    > goto charger_det_done;
    > }
    >
    > + cht_wc_extcon_set_otgmode(ext, false);
    > +
    > /* Plugged into a host/charger or not connected? */
    > if (!(pwrsrc_sts & CHT_WC_PWRSRC_VBUS)) {
    > /* Route D+ and D- to PMIC for future charger detection */
    >

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