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SubjectRe: [PATCH 1/4] dt-bindings: clock: exynos: Put CLK_UART3 in order
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Hi,

On 19. 2. 13. 오전 2:50, Krzysztof Kozlowski wrote:
> Order the CLK_UART3 by ID. No change in functionality.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
> include/dt-bindings/clock/exynos5410.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/dt-bindings/clock/exynos5410.h b/include/dt-bindings/clock/exynos5410.h
> index f179eabbcdb7..5b911ede0534 100644
> --- a/include/dt-bindings/clock/exynos5410.h
> +++ b/include/dt-bindings/clock/exynos5410.h
> @@ -36,6 +36,7 @@
> #define CLK_UART0 257
> #define CLK_UART1 258
> #define CLK_UART2 259
> +#define CLK_UART3 260
> #define CLK_I2C0 261
> #define CLK_I2C1 262
> #define CLK_I2C2 263
> @@ -44,7 +45,6 @@
> #define CLK_USI1 266
> #define CLK_USI2 267
> #define CLK_USI3 268
> -#define CLK_UART3 260
> #define CLK_PWM 279
> #define CLK_MCT 315
> #define CLK_WDT 316
>

Acked-by: Chanwoo Choi <cw00.choi@samsung.com>

--
Best Regards,
Chanwoo Choi
Samsung Electronics

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