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Subject[PATCH v6 0/4] IRQ affinity support in PLIC driver
This patchset primarily adds IRQ affinity support in PLIC driver and
other improvements.

It gives mechanism for explicitly route external interrupts to particular
CPUs using smp_affinity attribute of each Linux IRQs. Also, we can now
use IRQ balancer from kernel-space or user-space.

The patchset is tested on QEMU virt machine. It is based on Linux-5.0-rc6
and can be found at riscv_plic_irq_affinity_v6 branch of:

Changes since v5:
- Dropped PATCH2 based on discussion with Christoph

Changes since v4:
- Use "if (force)" instead of "if (!force)" in PATCH5

Changes since v3:
- Dropped PATCH2
- Added PATCH to not inline plic_toggle() and plic_irq_toggle()
- Moved PATCH3 changes to PATCH6
- Used WARN_ON_ONCE() instead of WARN_ON() in PATCH5

Changes since v2:
- Fixed incorrect address of enable registers using sizeof(u32) in PATCH1
- Retained comment about need for locking in PATCH1
- Split PATCH2 into two patches
- Split PATCH3 into two patches
- Minor fix in commit description of PATCH4

Changes since v1:
- Removed few whitspace changes from PATCH1
- Keep use of DEFINE_PER_CPU() as it is

Anup Patel (4):
irqchip: sifive-plic: Pre-compute context hart base and enable base
irqchip: sifive-plic: Add warning in plic_init() if handler already
irqchip: sifive-plic: Differentiate between PLIC handler and context
irqchip: sifive-plic: Implement irq_set_affinity() for SMP host

drivers/irqchip/irq-sifive-plic.c | 111 +++++++++++++++++++-----------
1 file changed, 72 insertions(+), 39 deletions(-)


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