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SubjectRe: [PATCH v5 1/5] irqchip: sifive-plic: Pre-compute context hart base and enable base
On Sat, Jan 19, 2019 at 11:26:21AM +0530, Anup Patel wrote:
> This patch does following optimizations:
> 1. Pre-compute hart base for each context handler
> 2. Pre-compute enable base for each context handler
> 3. Have enable lock for each context handler instead
> of global plic_toggle_lock
>
> Signed-off-by: Anup Patel <anup@brainfault.org>
> ---
> drivers/irqchip/irq-sifive-plic.c | 47 ++++++++++++++-----------------
> 1 file changed, 21 insertions(+), 26 deletions(-)

I don't really see the point, but the code looks clean enough and
removes a few lines, so:

Reviewed-by: Christoph Hellwig <hch@lst.de>

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