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SubjectRE: [PATCH 1/3] dt-bindings: fsl: scu: add general interrupt support
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Gentle ping...

Best Regards!
Anson Huang

> -----Original Message-----
> From: Anson Huang
> Sent: 2019年1月23日 16:01
> To: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
> Aisheng Dong <aisheng.dong@nxp.com>; ulf.hansson@linaro.org; Daniel
> Baluta <daniel.baluta@nxp.com>; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> Cc: dl-linux-imx <linux-imx@nxp.com>
> Subject: [PATCH 1/3] dt-bindings: fsl: scu: add general interrupt support
>
> Add scu general interrupt function support.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> .../devicetree/bindings/arm/freescale/fsl,scu.txt | 18 ++++++++++++------
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> index fd2bed2..3c976ac 100644
> --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> @@ -22,9 +22,11 @@ Required properties:
> -------------------
> - compatible: should be "fsl,imx-scu".
> - mbox-names: should include "tx0", "tx1", "tx2", "tx3",
> - "rx0", "rx1", "rx2", "rx3".
> -- mboxes: List of phandle of 4 MU channels for tx and 4 MU channels
> - for rx. All 8 MU channels must be in the same MU instance.
> + "rx0", "rx1", "rx2", "rx3",
> + "gi3".
> +- mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for
> + rx, and 1 MU channel for general interrupt. All 9 MU channels
> + must be in the same MU instance.
> Cross instances are not allowed. The MU instance can only
> be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users
> need
> to make sure use the one which is not conflict with other @@
> -34,6 +36,7 @@ Required properties:
> Channel 1 must be "tx1" or "rx1".
> Channel 2 must be "tx2" or "rx2".
> Channel 3 must be "tx3" or "rx3".
> + General interrupt channel must be "gi3".
> e.g.
> mboxes = <&lsio_mu1 0 0
> &lsio_mu1 0 1
> @@ -42,7 +45,8 @@ Required properties:
> &lsio_mu1 1 0
> &lsio_mu1 1 1
> &lsio_mu1 1 2
> - &lsio_mu1 1 3>;
> + &lsio_mu1 1 3
> + &lsio_mu1 3 3>;
> See Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> for detailed mailbox binding.
>
> @@ -130,7 +134,8 @@ firmware {
> scu {
> compatible = "fsl,imx-scu";
> mbox-names = "tx0", "tx1", "tx2", "tx3",
> - "rx0", "rx1", "rx2", "rx3";
> + "rx0", "rx1", "rx2", "rx3",
> + "gi3";
> mboxes = <&lsio_mu1 0 0
> &lsio_mu1 0 1
> &lsio_mu1 0 2
> @@ -138,7 +143,8 @@ firmware {
> &lsio_mu1 1 0
> &lsio_mu1 1 1
> &lsio_mu1 1 2
> - &lsio_mu1 1 3>;
> + &lsio_mu1 1 3
> + &lsio_mu1 3 3>;
>
> clk: clk {
> compatible = "fsl,imx8qxp-clk";
> --
> 2.7.4

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