Messages in this thread | | | From | Kevin Hilman <> | Subject | Re: [PATCH] dt-bindings: reset: meson8b: fix duplicate reset IDs | Date | Mon, 09 Dec 2019 14:25:57 -0800 |
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Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes:
> According to the public S805 datasheet the RESET2 register uses the > following bits for the PIC_DC, PSC and NAND reset lines: > - PIC_DC is at bit 3 (meaning: RESET_VD_RMEM + 3) > - PSC is at bit 4 (meaning: RESET_VD_RMEM + 4) > - NAND is at bit 5 (meaning: RESET_VD_RMEM + 4) > > Update the reset IDs of these three reset lines so they don't conflict > with PIC_DC and map to the actual hardware reset lines. > > Fixes: 79795e20a184eb ("dt-bindings: reset: Add bindings for the Meson SoC Reset Controller") > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Queued as a fix for v5.5-rc,
Thanks,
Kevin
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