| Date | Mon, 9 Dec 2019 07:49:13 -0800 | From | Sean Christopherson <> | Subject | Re: [PATCH 3.16 31/72] KVM: x86: Manually calculate reserved bits when loading PDPTRS |
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On Sun, Dec 08, 2019 at 01:53:15PM +0000, Ben Hutchings wrote: > 3.16.79-rc1 review patch. If anyone has any objections, please let me know. > > ------------------ > > From: Sean Christopherson <sean.j.christopherson@intel.com> > > commit 16cfacc8085782dab8e365979356ce1ca87fd6cc upstream.
You'll also want to pull in two PAE related fixes (in this order):
d35b34a9a70e ("kvm: mmu: Don't read PDPTEs when paging is not enabled") bf03d4f93347 ("KVM: x86: introduce is_pae_paging")
The "introduce is_pae_paging" has an undocumented bug fix. IIRC it manifests as an unexpected #GP on MOV CR3 in 64-bit mode. Here's the blurb I added to the backports for 4.x.
Moving to the common helper also fixes a subtle bug in kvm_set_cr3() where it fails to check is_long_mode() and results in KVM incorrectly attempting to load PDPTRs for a 64-bit guest.
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