lkml.org 
[lkml]   [2019]   [Dec]   [2]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH 1/2] soc: imx: gpcv2: Add support for imx8mm
From
Date
On Fri, 2019-11-29 at 17:41 -0600, Adam Ford wrote:
> The technical reference manual for both the i.MX8MQ and i.MX8M Mini
> appear to show the same register definitions and locations for the
> General Power Controller (GPC).
>
> This patch expands the table of compatible SoC's to include
> the i.MX8m Mini
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
>
> diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
> index b0dffb06c05d..67c54cbb6c81 100644
> --- a/drivers/soc/imx/gpcv2.c
> +++ b/drivers/soc/imx/gpcv2.c
> @@ -641,6 +641,7 @@ static int imx_gpcv2_probe(struct platform_device *pdev)
> static const struct of_device_id imx_gpcv2_dt_ids[] = {
> { .compatible = "fsl,imx7d-gpc", .data = &imx7_pgc_domain_data, },
> { .compatible = "fsl,imx8mq-gpc", .data = &imx8m_pgc_domain_data, },
> + { .compatible = "fsl,imx8mm-gpc", .data = &imx8m_pgc_domain_data, },

According to the 5.2.5.1 "PGC power domains" chapters in both the i.MX
8M Dual/8M QuadLite/8M Quad and i.MX 8M Mini Applications Processor
Reference Manuals (Rev.1), the two SoCs have a different list of power
domains:

i.MX8MQ:
PGC_C0
PGC_C1
PGC_C2
PGC_C3
PGC_SCU
PGC_MF
PGC_OTG1
PGC_OTG2
PGC_PCIE
PGC_MIPI
PGC_DDR1
PGC_DDR2
PGC_VPU
PGC_GPU
PGC_HDMI
PGC_DISP
PGC_MIPI_CSI1
PGC_MIPI_CSI2
PGC_PCIE2

i.MX8MM:
PGC_C0
PGC_C1
PGC_C2
PGC_C3
PGC_SCU
PGC_NOC
PGC_PCIE
PGC_OTG1
PGC_OTG2
PGC_DDR1
PGC_DISPMIX
GPC_MIPI
PGC_GPUMIX
PGC_GPU_3D
PGC_GPU_2D
PGC_VPUMIX
PGC_VPU_G1
PGC_VPU_G2
PGC_VPU_H1

regards
Philipp

\
 
 \ /
  Last update: 2019-12-02 15:29    [W:0.074 / U:4.864 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site