Messages in this thread | | | Subject | Re: [PATCH 2/2] clk: mmp2: Fix the order of timer mux parents | From | Stephen Boyd <> | Date | Wed, 18 Dec 2019 21:14:37 -0800 |
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Quoting Lubomir Rintel (2019-12-18 11:04:54) > Determined empirically, no documentation is available. > > The OLPC XO-1.75 laptop used parent 1, that one being VCTCXO/4 (65MHz), but > thought it's a VCTCXO/2 (130MHz). The mmp2 timer driver, not knowing > what is going on, ended up just dividing the rate as of > commit f36797ee4380 ("ARM: mmp/mmp2: dt: enable the clock")' > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> > ---
Any Fixes: tag?
Acked-by: Stephen Boyd <sboyd@kernel.org>
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