Messages in this thread Patch in this message | | | From | Weiyi Lu <> | Subject | [PATCH v9 2/9] dt-bindings: soc: Add MT8183 power dt-bindings | Date | Tue, 10 Dec 2019 14:46:46 +0800 |
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Add power dt-bindings of MT8183 and introduces "BASIC" and "SUBSYS" clock types in binding document. The "BASIC" type is compatible to the original power control with clock name [a-z]+[0-9]*, e.g. mm, vpu1. The "SUBSYS" type is used for bus protection control with clock name [a-z]+-[0-9]+, e.g. isp-0, cam-1.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> --- .../devicetree/bindings/soc/mediatek/scpsys.txt | 20 ++++++++++++++--- include/dt-bindings/power/mt8183-power.h | 26 ++++++++++++++++++++++ 2 files changed, 43 insertions(+), 3 deletions(-) create mode 100644 include/dt-bindings/power/mt8183-power.h
diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt index 8f469d8..8e0e1ed 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt @@ -14,6 +14,7 @@ power/power-domain.yaml. It provides the power domains defined in - include/dt-bindings/power/mt2701-power.h - include/dt-bindings/power/mt2712-power.h - include/dt-bindings/power/mt7622-power.h +- include/dt-bindings/power/mt8183-power.h Required properties: - compatible: Should be one of: @@ -25,18 +26,31 @@ Required properties: - "mediatek,mt7623a-scpsys": For MT7623A SoC - "mediatek,mt7629-scpsys", "mediatek,mt7622-scpsys": For MT7629 SoC - "mediatek,mt8173-scpsys" + - "mediatek,mt8183-scpsys" - #power-domain-cells: Must be 1 - reg: Address range of the SCPSYS unit - infracfg: must contain a phandle to the infracfg controller -- clock, clock-names: clocks according to the common clock binding. - These are clocks which hardware needs to be - enabled before enabling certain power domains. +- clock, clock-names: Clocks according to the common clock binding. + Some SoCs have to groups of clocks. + BASIC clocks need to be enabled before enabling the + corresponding power domain. + SUBSYS clocks need to be enabled before releasing the + bus protection. Required clocks for MT2701 or MT7623: "mm", "mfg", "ethif" Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec" Required clocks for MT6797: "mm", "mfg", "vdec" Required clocks for MT7622 or MT7629: "hif_sel" Required clocks for MT7623A: "ethif" Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt" + Required clocks for MT8183: BASIC: "audio", "mfg", "mm", "cam", "isp", + "vpu", "vpu1", "vpu2", "vpu3" + SUBSYS: "mm-0", "mm-1", "mm-2", "mm-3", + "mm-4", "mm-5", "mm-6", "mm-7", + "mm-8", "mm-9", "isp-0", "isp-1", + "cam-0", "cam-1", "cam-2", "cam-3", + "cam-4", "cam-5", "cam-6", "vpu-0", + "vpu-1", "vpu-2", "vpu-3", "vpu-4", + "vpu-5" Optional properties: - vdec-supply: Power supply for the vdec power domain diff --git a/include/dt-bindings/power/mt8183-power.h b/include/dt-bindings/power/mt8183-power.h new file mode 100644 index 0000000..5c0c8c7 --- /dev/null +++ b/include/dt-bindings/power/mt8183-power.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (c) 2018 MediaTek Inc. + * Author: Weiyi Lu <weiyi.lu@mediatek.com> + */ + +#ifndef _DT_BINDINGS_POWER_MT8183_POWER_H +#define _DT_BINDINGS_POWER_MT8183_POWER_H + +#define MT8183_POWER_DOMAIN_AUDIO 0 +#define MT8183_POWER_DOMAIN_CONN 1 +#define MT8183_POWER_DOMAIN_MFG_ASYNC 2 +#define MT8183_POWER_DOMAIN_MFG 3 +#define MT8183_POWER_DOMAIN_MFG_CORE0 4 +#define MT8183_POWER_DOMAIN_MFG_CORE1 5 +#define MT8183_POWER_DOMAIN_MFG_2D 6 +#define MT8183_POWER_DOMAIN_DISP 7 +#define MT8183_POWER_DOMAIN_CAM 8 +#define MT8183_POWER_DOMAIN_ISP 9 +#define MT8183_POWER_DOMAIN_VDEC 10 +#define MT8183_POWER_DOMAIN_VENC 11 +#define MT8183_POWER_DOMAIN_VPU_TOP 12 +#define MT8183_POWER_DOMAIN_VPU_CORE0 13 +#define MT8183_POWER_DOMAIN_VPU_CORE1 14 + +#endif /* _DT_BINDINGS_POWER_MT8183_POWER_H */ -- 1.8.1.1.dirty | |