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SubjectRe: [PATCH v3 2/2] clocksource/drivers/timer-microchip-pit64b: add Microchip PIT64B support
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On 10/12/2019 12:43, Claudiu.Beznea@microchip.com wrote:
>
>
> On 09.12.2019 19:04, Daniel Lezcano wrote:
>> On 04/12/2019 15:42, Claudiu Beznea wrote:
>>> Add driver for Microchip PIT64B timer. Timer could be used in continuous
>>> mode or oneshot mode. The hardware has 2x32 bit registers for period
>>> emulating a 64 bit timer. The LSB_PR and MSB_PR registers are used to
>>> set the period value (compare value). TLSB and TMSB keeps the current
>>> value of the counter. After a compare the TLSB and TMSB register resets.
>>> The driver uses PIT64B timer for clocksource or clockevent. First
>>> requested timer would be registered as clockevent, second one would be
>>> registered as clocksource. Individual PIT64B hardware resources were used
>>> for clocksource and clockevent to be able to support high resolution
>>> timers with this hardware implementation.
>>>
>>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>>> ---

[ ... ]

>> Also, the 'high' part change may be checked, like:
>>
>> https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git/tree/drivers/clocksource/timer-imx-sysctr.c?h=bleeding-edge#n51
>
> The IP guarantees that the reading of counter is atomic if
> MCHP_PIT64B_TLSBR is read first. With this, would you still want to add the
> check you mention above?

No, sorry I should have read the comment :/

[ ... ]


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