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    Subject[PATCH AUTOSEL 5.4 072/350] MIPS: syscall: Emit Loongson3 sync workarounds within asm
    Date
    From: Paul Burton <paul.burton@mips.com>

    [ Upstream commit e84957e6ae043bb83ad6ae7e949a1ce97b6bbfef ]

    Generate the sync instructions required to workaround Loongson3 LL/SC
    errata within inline asm blocks, which feels a little safer than doing
    it from C where strictly speaking the compiler would be well within its
    rights to insert a memory access between the separate asm statements we
    previously had, containing sync & ll instructions respectively.

    Signed-off-by: Paul Burton <paul.burton@mips.com>
    Cc: linux-mips@vger.kernel.org
    Cc: Huacai Chen <chenhc@lemote.com>
    Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
    Cc: linux-kernel@vger.kernel.org
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/mips/kernel/syscall.c | 3 ++-
    1 file changed, 2 insertions(+), 1 deletion(-)

    diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
    index 3f16f38230310..c333e57886642 100644
    --- a/arch/mips/kernel/syscall.c
    +++ b/arch/mips/kernel/syscall.c
    @@ -37,6 +37,7 @@
    #include <asm/signal.h>
    #include <asm/sim.h>
    #include <asm/shmparam.h>
    +#include <asm/sync.h>
    #include <asm/sysmips.h>
    #include <asm/switch_to.h>

    @@ -133,12 +134,12 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new)
    [efault] "i" (-EFAULT)
    : "memory");
    } else if (cpu_has_llsc) {
    - loongson_llsc_mb();
    __asm__ __volatile__ (
    " .set push \n"
    " .set "MIPS_ISA_ARCH_LEVEL" \n"
    " li %[err], 0 \n"
    "1: \n"
    + " " __SYNC(full, loongson3_war) " \n"
    user_ll("%[old]", "(%[addr])")
    " move %[tmp], %[new] \n"
    "2: \n"
    --
    2.20.1
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