lkml.org 
[lkml]   [2019]   [Dec]   [10]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH AUTOSEL 5.4 216/350] drm: msm: a6xx: fix debug bus register configuration
    Date
    From: Sharat Masetty <smasetty@codeaurora.org>

    [ Upstream commit 7f4009c4bbea4438b50f3b12d1c57da3f5cd8db3 ]

    Fix the cx debugbus related register configuration, to collect accurate
    bus data during gpu snapshot. This helps with complete snapshot dump
    and also complete proper GPU recovery.

    Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state")
    Reviewed-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
    Signed-off-by: Sean Paul <seanpaul@chromium.org>
    Link: https://patchwork.freedesktop.org/patch/339165
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 24 ++++++++++-----------
    1 file changed, 12 insertions(+), 12 deletions(-)

    diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
    index e686331fa0898..691c1a277d91b 100644
    --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
    +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
    @@ -352,26 +352,26 @@ static void a6xx_get_debugbus(struct msm_gpu *gpu,
    cxdbg = ioremap(res->start, resource_size(res));

    if (cxdbg) {
    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_CNTLT,
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLT,
    A6XX_DBGC_CFG_DBGBUS_CNTLT_SEGT(0xf));

    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_CNTLM,
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_CNTLM,
    A6XX_DBGC_CFG_DBGBUS_CNTLM_ENABLE(0xf));

    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_0, 0);
    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_1, 0);
    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_2, 0);
    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_3, 0);
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_0, 0);
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_1, 0);
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_2, 0);
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_IVTL_3, 0);

    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_BYTEL_0,
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_0,
    0x76543210);
    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_BYTEL_1,
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_BYTEL_1,
    0xFEDCBA98);

    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_0, 0);
    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_1, 0);
    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_2, 0);
    - cxdbg_write(cxdbg, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_3, 0);
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_0, 0);
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_1, 0);
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_2, 0);
    + cxdbg_write(cxdbg, REG_A6XX_CX_DBGC_CFG_DBGBUS_MASKL_3, 0);
    }

    a6xx_state->debugbus = state_kcalloc(a6xx_state,
    --
    2.20.1
    \
     
     \ /
      Last update: 2019-12-10 22:24    [W:4.016 / U:0.404 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site