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Subject[PATCH v5 2/2] dt-bindings: pinctrl: intel: Add for new SoC
Date
Add dt bindings document for pinmux & GPIO controller driver of
Intel Lightning Mountain SoC.

Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com>
---
.../bindings/pinctrl/intel,lgm-pinctrl.yaml | 104 +++++++++++++++++++++
1 file changed, 104 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml
new file mode 100644
index 000000000000..64edd3115131
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/intel,lgm-pinctrl.yaml
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/pinctrl/intel,lgm-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel Lightning Mountain SoC pinmux & GPIO controller binding
+
+maintainers:
+ - Rahul Tanwar <rahul.tanwar@linux.intel.com>
+
+description: |
+ Pinmux & GPIO controller controls pin multiplexing & configuration including
+ GPIO function selection & GPIO attributes configuration.
+
+ Please refer to [1] for details of the common pinctrl bindings used by the
+ client devices.
+
+ [1] Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+
+properties:
+ compatible:
+ const: intel,lgm-pinctrl
+
+ reg:
+ maxItems: 1
+
+# Client device subnode's properties
+patternProperties:
+ '-pins$':
+ type: object
+ description:
+ Pinctrl node's client devices use subnodes for desired pin configuration.
+ Client device subnodes use below standard properties.
+
+ properties:
+ function:
+ $ref: /schemas/types.yaml#/definitions/string
+ description:
+ A string containing the name of the function to mux to the group.
+
+ groups:
+ $ref: /schemas/types.yaml#/definitions/string-array
+ description:
+ An array of strings identifying the list of groups.
+
+ pins:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ List of pins to select with this function.
+
+ pinmux:
+ description: The applicable mux group.
+ allOf:
+ - $ref: "/schemas/types.yaml#/definitions/uint32-array"
+ - enum:
+ - 0 #PINMUX_GPIO
+ - 1
+ - 2
+ - 3
+ - 4
+
+ bias-pull-up:
+ type: boolean
+ bias-pull-down:
+ type: boolean
+ drive-strength:
+ type: boolean
+ slew-rate:
+ type: boolean
+ drive-open-drain:
+ type: boolean
+ output-enable:
+ type: boolean
+
+ required:
+ - function
+ - groups
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ # Pinmux controller node
+ - |
+ pinctrl: pinctrl@e2880000 {
+ compatible = "intel,lgm-pinctrl";
+ reg = <0xe2880000 0x100000>;
+
+ # Client device subnode
+ uart0-pins: uart0 {
+ pins = <64>, /* UART_RX0 */
+ <65>; /* UART_TX0 */
+ function = "CONSOLE_UART0";
+ pinmux = <1>,
+ <1>;
+ groups = "CONSOLE_UART0";
+ };
+ };
+
+...
--
2.11.0
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