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SubjectRe: [patch 4/9] x86/io: Speedup schedule out of I/O bitmap user

> On Nov 8, 2019, at 3:45 PM, Thomas Gleixner <> wrote:
> On Fri, 8 Nov 2019, Andy Lutomirski wrote:
>>> On 11/7/19 6:08 AM, Thomas Gleixner wrote:
>>> On Thu, 7 Nov 2019, Thomas Gleixner wrote:
>>>> Just that I can't add the storage to tss_struct due to the VMX insanity of
>>>> setting TSS limit hard to 0x67 on vmexit instead of restoring the host
>>>> value.
>>> Well, I can. The build bugon in vmx.c is just bogus.
>> SDM vol 3 27.5.2 says the BUILD_BUG_ON is right. Or am I
>> misunderstanding you?
>> I'm reasonably confident that the TSS limit is indeed 0x67 after VM
>> exit, and I wrote the existing code that tries to optimize this to avoid
>> LTR when not needed.
> The BUILD_BUG_ON(IO_BITMAP_OFFSET - 1 == 0x67) in the VMX code is bogus in
> two aspects:
> 1) This wants to be in generic x86 code

I think disagree. The only thing special about 0x67 is that VMX hard codes it. It’s specifically a VMX-ism. So I think the VMX code should indeed assert that 0x67 is a safe value.

> 2) The IO_BITMAP_OFFSET is not the right thing to check because it makes
> asssumptions about the layout of tss_struct. Nothing requires that the
> I/O bitmap is placed right after x86_tss, which is the hardware mandated
> tss structure. It pointlessly makes restrictions on the struct
> tss_struct layout.

I agree with this.

> The proper thing to check is:
> - Offset of x86_tss in tss_struct is 0
> - Size of x86_tss == 0x68
> We already have the page alignment sanity check off TSS in
> cpu_entry_area.c. That's where this should have gone into in the first
> place.

> Thanks,
> tglx

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