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SubjectRe: [PATCH v4 2/3] dt-bindings: phy: ti,phy-j721e-wiz: Add Type-C dir GPIO
On Mon, 28 Oct 2019 12:21:52 +0200, Roger Quadros wrote:
> This is an optional GPIO, if specified will be used to
> swap lane 0 and lane 1 based on GPIO status. This is required
> to achieve plug flip support for USB Type-C.
>
> Type-C companions typically need some time after the cable is
> plugged before and before they reflect the correct status of
> Type-C plug orientation on the DIR line.
>
> Type-C Spec specifies CC attachment debounce time (tCCDebounce)
> of 100 ms (min) to 200 ms (max).
>
> Allow the DT node to specify the time (in ms) that we need
> to wait before sampling the DIR line.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Cc: Rob Herring <robh@kernel.org>
> ---
> .../bindings/phy/ti,phy-j721e-wiz.yaml | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>

Reviewed-by: Rob Herring <robh@kernel.org>

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