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    Subject[PATCH 4.19 133/149] drm/amdgpu/powerplay/vega10: allow undervolting in p7
    Date
    From: Pelle van Gils <pelle@vangils.xyz>

    commit e6f4e274c1e52d1f0bfe293fb44ddf59de6c0374 upstream.

    The vega10_odn_update_soc_table() function does not allow the SCLK
    dependent voltage to be set for power-state 7 to a value below the default
    in pptable. Change the for-loop condition to allow undervolting in the
    highest state.

    Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205277
    Signed-off-by: Pelle van Gils <pelle@vangils.xyz>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Cc: stable@vger.kernel.org
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 4 +---
    1 file changed, 1 insertion(+), 3 deletions(-)

    --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
    +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
    @@ -4751,9 +4751,7 @@ static void vega10_odn_update_soc_table(

    if (type == PP_OD_EDIT_SCLK_VDDC_TABLE) {
    podn_vdd_dep = &data->odn_dpm_table.vdd_dep_on_sclk;
    - for (i = 0; i < podn_vdd_dep->count - 1; i++)
    - od_vddc_lookup_table->entries[i].us_vdd = podn_vdd_dep->entries[i].vddc;
    - if (od_vddc_lookup_table->entries[i].us_vdd < podn_vdd_dep->entries[i].vddc)
    + for (i = 0; i < podn_vdd_dep->count; i++)
    od_vddc_lookup_table->entries[i].us_vdd = podn_vdd_dep->entries[i].vddc;
    } else if (type == PP_OD_EDIT_MCLK_VDDC_TABLE) {
    podn_vdd_dep = &data->odn_dpm_table.vdd_dep_on_mclk;

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