lkml.org 
[lkml]   [2019]   [Nov]   [27]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 4.14 158/211] PCI: keystone: Use quirk to limit MRRS for K2G
    Date
    From: Kishon Vijay Abraham I <kishon@ti.com>

    [ Upstream commit 148e340c0696369fadbbddc8f4bef801ed247d71 ]

    PCI controller in K2G also has a limitation that memory read request
    size (MRRS) must not exceed 256 bytes. Use the quirk to limit MRRS
    (added for K2HK, K2L and K2E) for K2G as well.

    Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/pci/dwc/pci-keystone.c | 3 +++
    1 file changed, 3 insertions(+)

    diff --git a/drivers/pci/dwc/pci-keystone.c b/drivers/pci/dwc/pci-keystone.c
    index 9bc52e4cf52a0..3ea8288c16053 100644
    --- a/drivers/pci/dwc/pci-keystone.c
    +++ b/drivers/pci/dwc/pci-keystone.c
    @@ -39,6 +39,7 @@
    #define PCIE_RC_K2HK 0xb008
    #define PCIE_RC_K2E 0xb009
    #define PCIE_RC_K2L 0xb00a
    +#define PCIE_RC_K2G 0xb00b

    #define to_keystone_pcie(x) dev_get_drvdata((x)->dev)

    @@ -53,6 +54,8 @@ static void quirk_limit_mrrs(struct pci_dev *dev)
    .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
    { PCI_DEVICE(PCI_VENDOR_ID_TI, PCIE_RC_K2L),
    .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
    + { PCI_DEVICE(PCI_VENDOR_ID_TI, PCIE_RC_K2G),
    + .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
    { 0, },
    };

    --
    2.20.1


    \
     
     \ /
      Last update: 2019-11-27 22:33    [W:4.032 / U:0.088 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site