Messages in this thread | | | Subject | Re: [PATCH v2 08/10] iommu/vt-d: Fix PASID cache flush | From | Auger Eric <> | Date | Mon, 18 Nov 2019 22:19:03 +0100 |
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Hi Jacob, On 11/18/19 8:42 PM, Jacob Pan wrote: > Use the correct invalidation descriptor type and granularity. > > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> > Acked-by: Lu Baolu <baolu.lu@linux.intel.com> > --- > drivers/iommu/intel-pasid.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/iommu/intel-pasid.c b/drivers/iommu/intel-pasid.c > index 3cb569e76642..ee6ea1bbd917 100644 > --- a/drivers/iommu/intel-pasid.c > +++ b/drivers/iommu/intel-pasid.c > @@ -365,7 +365,8 @@ pasid_cache_invalidation_with_pasid(struct intel_iommu *iommu, > { > struct qi_desc desc; > > - desc.qw0 = QI_PC_DID(did) | QI_PC_PASID_SEL | QI_PC_PASID(pasid); > + desc.qw0 = QI_PC_DID(did) | QI_PC_GRAN(QI_PC_PASID_SEL) | > + QI_PC_PASID(pasid) | QI_PC_TYPE; Hum I am confused
#define QI_PC_PASID_SEL (QI_PC_TYPE | QI_PC_GRAN(1))
So the original looks correct to me?
Thanks
Eric
> desc.qw1 = 0; > desc.qw2 = 0; > desc.qw3 = 0; >
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