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    Subject[PATCH v2 06/10] iommu/vt-d: Fix off-by-one in PASID allocation
    Date
    PASID allocator uses IDR which is exclusive for the end of the
    allocation range. There is no need to decrement pasid_max.

    Fixes: af39507305fb ("iommu/vt-d: Apply global PASID in SVA")
    Reported-by: Eric Auger <eric.auger@redhat.com>
    Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
    Acked-by: Lu Baolu <baolu.lu@linux.intel.com>
    ---
    drivers/iommu/intel-svm.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
    index 74df10a39dfc..e90d0b914afe 100644
    --- a/drivers/iommu/intel-svm.c
    +++ b/drivers/iommu/intel-svm.c
    @@ -338,7 +338,7 @@ int intel_svm_bind_mm(struct device *dev, int *pasid, int flags, struct svm_dev_
    /* Do not use PASID 0 in caching mode (virtualised IOMMU) */
    ret = intel_pasid_alloc_id(svm,
    !!cap_caching_mode(iommu->cap),
    - pasid_max - 1, GFP_KERNEL);
    + pasid_max, GFP_KERNEL);
    if (ret < 0) {
    kfree(svm);
    kfree(sdev);
    --
    2.7.4
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