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    SubjectRe: [PATCH v4 04/47] soc: fsl: qe: introduce qe_io{read,write}* wrappers
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    On 11/12/19 1:14 AM, Rasmus Villemoes wrote:
    > but that's because readl and writel by definition work on little-endian
    > registers. I.e., on a BE platform, the readl and writel implementation
    > must themselves contain a swab, so the above would end up doing two
    > swabs on a BE platform.

    Do you know whether the compiler optimizes-out the double swab?

    > (On PPC, there's a separate definition of mmio_read32be, namely
    > writel_be, which in turn does a out_be32, so on PPC that doesn't
    > actually end up doing two swabs).
    >
    > So ioread32be etc. have well-defined semantics: access a big-endian
    > register and return the result in native endianness.

    It seems weird that there aren't any cross-arch lightweight
    endian-specific I/O accessors.

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