lkml.org 
[lkml]   [2019]   [Nov]   [1]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    SubjectRe: [PATCH 1/2] pinctrl: bcm: nsp: use gpiolib infrastructure for interrupts
    From
    Date


    On 10/31/2019 6:56 PM, Chris Packham wrote:
    > Use more of the gpiolib infrastructure for handling interrupts. The
    > root interrupt still needs to be handled manually as it is shared with
    > other peripherals on the SoC.
    >
    > This will allow multiple instances of this driver to be supported and
    > will clean up gracefully on failure thanks to the device managed APIs.
    >
    > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
    > ---

    Just a couple of comments below:

    [snip]

    > + irqc->name = dev_name(dev);

    The irq_chip used to be named "gpio-a" now it most likely will contain
    the address.unit-name notation from Device Tree, since this is visible
    in /proc/interrupts one might consider this to be an ABI breakage.

    > + irqc->irq_ack = nsp_gpio_irq_ack;
    > + irqc->irq_mask = nsp_gpio_irq_mask;
    > + irqc->irq_unmask = nsp_gpio_irq_unmask;
    > + irqc->irq_set_type = nsp_gpio_irq_set_type;
    >
    > - irq_set_chip_and_handler(irq, &nsp_gpio_irq_chip,
    > - handle_simple_irq);
    > - irq_set_chip_data(irq, chip);
    > - }
    > + val = readl(chip->base + NSP_CHIP_A_INT_MASK);
    > + val = val | NSP_CHIP_A_GPIO_INT_BIT;
    > + writel(val, (chip->base + NSP_CHIP_A_INT_MASK));
    >
    > /* Install ISR for this GPIO controller. */
    > - ret = devm_request_irq(&pdev->dev, irq, nsp_gpio_irq_handler,
    > - IRQF_SHARED, "gpio-a", chip);
    > + ret = devm_request_irq(dev, irq, nsp_gpio_irq_handler,
    > + IRQF_SHARED, "gpio-a", &chip->gc);
    > if (ret) {
    > dev_err(&pdev->dev, "Unable to request IRQ%d: %d\n",
    > irq, ret);
    > - goto err_rm_gpiochip;
    > + return ret;
    > }
    >
    > - val = readl(chip->base + NSP_CHIP_A_INT_MASK);
    > - val = val | NSP_CHIP_A_GPIO_INT_BIT;
    > - writel(val, (chip->base + NSP_CHIP_A_INT_MASK));
    > + girq = &chip->gc.irq;
    > + girq->chip = irqc;
    > + /* This will let us handle the parent IRQ in the driver */
    > + girq->parent_handler = NULL;
    > + girq->num_parents = 0;
    > + girq->parents = NULL;
    > + girq->default_type = IRQ_TYPE_NONE;
    > + girq->handler = handle_simple_irq;

    It might be worth creating a helper that can be called to initialize all
    relevant members to the values that indicate: let me manage the
    interrupt. This would make us more future proof with respect to
    assumptions being made in gpiolib as well as if new fields are added in
    the future. This would be a separate patch obviously.

    Other than that:

    Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
    --
    Florian

    \
     
     \ /
      Last update: 2019-11-02 03:56    [W:3.480 / U:0.040 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site