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SubjectPotential issue setting vid_regs in Rockchip AXI PCIe endpoint controller driver
Date
Hi,

Static analysis with Coverity has detected a potential issue in the
Rockchip AXI PCIe endpoint controller driver. The issue is in
drivers/pci/controller/pcie-rockchip-ep.c, function
rockchip_pcie_ep_write_header:

The coverity report is as follows:

124 static int rockchip_pcie_ep_write_header(struct pci_epc *epc, u8 fn,
125 struct pci_epf_header *hdr)
126 {
127 struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
128 struct rockchip_pcie *rockchip = &ep->rockchip;
129
130 /* All functions share the same vendor ID with function 0 */
131 if (fn == 0) {
132 u32 vid_regs = (hdr->vendorid & GENMASK(15, 0)) |

CID 12883 (#1 of 1): Operands don't affect result

(CONSTANT_EXPRESSION_RESULT) result_independent_of_operands:

hdr->subsys_vendor_id & (4294901760UL /* ~0UL - (1UL << 16) + 1 & (~0UL
>> 64 - 1 - 31) */) is always 0 regardless of the values of its
operands. This occurs as a value.

133 (hdr->subsys_vendor_id & GENMASK(31,
16)) << 16;

The expression (hdr->subsys_vendor_id & GENMASK(31, 16)) << 16 always
results in zero. Since the GENMASK gets the top 16 bits of
hdr->subsys_vendor_id then it looks like the 16 bit left shift is not
required, but I don't know if that is a correct assumption or not.

Colin

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