Messages in this thread | | | Subject | Re: [PATCH 10/16] x86/cpu: Detect VMX features on Intel, Centaur and Zhaoxin CPUs | From | Paolo Bonzini <> | Date | Mon, 7 Oct 2019 19:11:24 +0200 |
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On 04/10/19 23:56, Sean Christopherson wrote: > + /* > + * The high bits contain the allowed-1 settings, i.e. features that can > + * be turned on. The low bits contain the allowed-0 settings, i.e. > + * features that can be turned off. Ignore the allowed-0 settings, > + * if a feature can be turned on then it's supported. > + */ > + rdmsr(MSR_IA32_VMX_PINBASED_CTLS, ign, supported);
For QEMU, we're defining a feature as supported if a feature can be turned both on and off. Since msr_low and msr_high can be defined respectively as must-be-one and can-be-one, the features become "msr_high & ~msr_low".
Also, shouldn't this use the "true" feature availability MSRs if available?
Paolo
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