Messages in this thread | | | Date | Sat, 19 Oct 2019 22:24:13 +0200 | From | Alexander Sverdlin <> | Subject | Re: [PATCH 2/6] ARM: ep93xx: enable SPARSE_IRQ |
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Hi!
On Sat, 19 Oct 2019 22:08:40 +0200 Arnd Bergmann <arnd@arndb.de> wrote:
> > # cat /proc/interrupts > > CPU0 > > 39: 146 VIC 7 Edge eth0 > > 51: 162161 VIC 19 Edge ep93xx timer > > 52: 139 VIC 20 Edge uart-pl010 > > 53: 4 VIC 21 Edge ep93xx-spi > > 60: 0 VIC 28 Edge ep93xx-i2s > > Err: 0 > > I guess that is partial success: some irqs do work ;-)
Yep, VIC1 is working, while VIC0 is not.
> The two interrupts that did not get registered are for the > dmaengine driver, and that makes sense given the error > message about the DMA not working. No idea how > that would be a result of the irq changes though.
Seems, that it has exposed some incompatibilities of starting IRQ 0 in EP93xx platform fir VIC0 and VIC code itself, which assumes 0 means "auto assignment" (refer to vic_init()).
But there are more problems I didn't resolve yet.
-- Alexander Sverdlin.
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