Messages in this thread Patch in this message | | | From | Kai-Heng Feng <> | Subject | [PATCH] x86/intel: Disable HPET on Intel Coffe Lake platforms | Date | Wed, 16 Oct 2019 18:38:16 +0800 |
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Some Coffee Lake platforms have skewed HPET timer once the SoCs entered PC10, and marked TSC as unstable clocksource as result.
Harry Pan identified it's a firmware bug [1].
To prevent creating a circular dependency between HPET and TSC, let's disable HPET on affected platforms.
[1]: https://lore.kernel.org/lkml/20190516090651.1396-1-harry.pan@intel.com/ Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203183
Cc: <stable@vger.kernel.org> Suggested-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> --- arch/x86/kernel/early-quirks.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 6f6b1d04dadf..4cba91ec8049 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c @@ -710,6 +710,8 @@ static struct chipset early_qrk[] __initdata = { */ { PCI_VENDOR_ID_INTEL, 0x0f00, PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, + { PCI_VENDOR_ID_INTEL, 0x3ec4, + PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, { PCI_VENDOR_ID_BROADCOM, 0x4331, PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset}, {} -- 2.17.1
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