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SubjectRe: [PATCH 2/2] clk: aspeed: Setup video engine clocking
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Quoting Eddie James (2018-12-14 07:47:53)
>
>
> On 12/13/2018 07:02 PM, Joel Stanley wrote:
>
> >
> >> + { 0x0, 2 },
> >> + { 0x1, 2 },
> >> + { 0x2, 3 },
> >> + { 0x3, 4 },
> >> + { 0x4, 5 },
> >> + { 0x5, 6 },
> >> + { 0x6, 7 },
> >> + { 0x7, 8 },
> >> + { 0 }
> >> +};
> >> @@ -317,6 +338,7 @@ struct aspeed_reset {
> >> [ASPEED_RESET_PECI] = 10,
> >> [ASPEED_RESET_I2C] = 2,
> >> [ASPEED_RESET_AHB] = 1,
> >> + [ASPEED_RESET_VIDEO] = 6,
> > You've added the reset line to the ASPEED_CLK_GATE_ECLK clock so you
> > do not need to separately expose the reset controller. Instead
> > enabling the clock will deassert the rest line for you.
> >
> > This means you should drop the change from the header too, and it
> > affects the bindings document for the video engine.
>
> I want that reset available separately for use in the video engine
> actually. I could do without it, but it's somewhat useful.
>

Joel, are you happy with these patches? I'm tempted to drop these
changes from my queue because there hasn't been any news in over a
month.

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