Messages in this thread | | | Subject | Re: [PATCH v4 2/2] spi-atmel: support inter-word delay | From | Jonas Bonn <> | Date | Tue, 29 Jan 2019 15:56:31 +0100 |
| |
Hi,
On 29/01/2019 15:27, Nicolas.Ferre@microchip.com wrote: > On 29/01/2019 at 09:38, Jonas Bonn wrote: >> >> + /* DLYBCT adds delays between words. This is useful for slow devices >> + * that need a bit of time to setup the next transfer. >> + */ >> + if (spi->word_delay_us) { > > Well... > >> + csr |= SPI_BF(DLYBCT, >> + clamp_t(u8, >> + (as->spi_clk/1000000*spi->word_delay_us)>>5, >> + 1, 255)); > > ... why not simplifying to: > + 0, 255)); > and remove the test altogether, after all?
Hmm... that seemed too easy! This started out as something else and looking at it now I think even the clamp_t() is unnecessary. The value is already 0-255 and the way SPI_BF works any overflow is already truncated... I'll rework this and resubmit once I get some feedback on the word_delay_us bits.
Thanks, /Jonas
| |