Messages in this thread | | | Subject | Re: [PATCH] clk: ingenic: jz4740: Fix gating of UDC clock | From | Stephen Boyd <> | Date | Tue, 29 Jan 2019 10:13:10 -0800 |
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Quoting Paul Cercueil (2019-01-25 11:24:58) > Hi, > > > On Fri, Jan 25, 2019 at 3:55 PM, Stephen Boyd <sboyd@kernel.org> wrote: > > Quoting Paul Cercueil (2019-01-25 07:34:36) > >> The UDC clock is gated when the bit is cleared, not when it is set. > >> > >> Signed-off-by: Paul Cercueil <paul@crapouillou.net > >> <mailto:paul@crapouillou.net>> > >> Tested-by: Artur Rojek <contact@artur-rojek.eu > >> <mailto:contact@artur-rojek.eu>> > >> --- > > > > Any Fixes tag for this? > > > > Fixes: 2b555a4b9cae > > Should I resend? >
No need to resend. Is this fixing something that's broken in the v5.0-rc series? I'm trying to understand if this is a critical fix or a non-critical fix that can bake until the next release cycle.
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