Messages in this thread Patch in this message | | | Date | Mon, 28 Jan 2019 12:47:00 +0000 | From | Marc Zyngier <> | Subject | Re: [PATCH v9 26/26] arm64: Enable the support of pseudo-NMIs |
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On Mon, 21 Jan 2019 15:33:45 +0000, Julien Thierry <julien.thierry@arm.com> wrote: > > Add a build option and a command line parameter to build and enable the > support of pseudo-NMIs. > > Signed-off-by: Julien Thierry <julien.thierry@arm.com> > Suggested-by: Daniel Thompson <daniel.thompson@linaro.org> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will.deacon@arm.com> > --- > Documentation/admin-guide/kernel-parameters.txt | 6 ++++++ > arch/arm64/Kconfig | 14 ++++++++++++++ > arch/arm64/kernel/cpufeature.c | 11 ++++++++++- > 3 files changed, 30 insertions(+), 1 deletion(-) > > diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt > index b799bcf..173e2cc 100644 > --- a/Documentation/admin-guide/kernel-parameters.txt > +++ b/Documentation/admin-guide/kernel-parameters.txt > @@ -1197,6 +1197,12 @@ > to discrete, to make X server driver able to add WB > entry later. This parameter enables that. > > + enable_pseudo_nmi [ARM64] > + Enables support for pseudo-NMIs in the kernel. This > + requires both the kernel to be built with > + CONFIG_ARM64_PSEUDO_NMI and to be running on a > + platform with GICv3. > + > enable_timer_pin_1 [X86] > Enable PIN 1 of APIC timer > Can be useful to work around chipset bugs > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index a4168d3..8d84bfd 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -1328,6 +1328,20 @@ config ARM64_MODULE_PLTS > bool > select HAVE_MOD_ARCH_SPECIFIC > > +config ARM64_PSEUDO_NMI > + bool "Support for NMI-like interrupts" > + select CONFIG_ARM_GIC_V3 > + help > + Adds support for mimicking Non-Maskable Interrupts through the use of > + GIC interrupt priority. This support requires version 3 or later of > + Arm GIC. > + > + This high priority configuration for interrupts need to be
s/need/needs/
> + explicitly enabled through the new kernel parameter
It won't be new forever... ;-)
> + "enable_pseudo_nmi".
I'm not overly keen on this name. We already have "irqchip.gicv3_nolpi", so why not adopt something similar. "irqchip.gicv3_pseudo_nmi", taking a boolean value?
> + > + If unsure, say N > + > config RELOCATABLE > bool > help > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index b530fb24..e66d778 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -1207,10 +1207,19 @@ static void cpu_enable_address_auth(struct arm64_cpu_capabilities const *cap) > #endif /* CONFIG_ARM64_PTR_AUTH */ > > #ifdef CONFIG_ARM64_PSEUDO_NMI > +static bool enable_pseudo_nmi; > + > +static int __init early_enable_pseudo_nmi(char *p) > +{ > + enable_pseudo_nmi = true;
And if you're happy with the above, this becomes:
return strtobool(p, &enable_pseudo_nmi);
> + return 0; > +} > +early_param("enable_pseudo_nmi", early_enable_pseudo_nmi); > + > static bool can_use_gic_priorities(const struct arm64_cpu_capabilities *entry, > int scope) > { > - return false; > + return enable_pseudo_nmi && has_useable_gicv3_cpuif(entry, scope); > } > #endif > > -- > 1.9.1 >
Thanks,
M.
-- Jazz is not dead, it just smell funny.
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