Messages in this thread Patch in this message | | | From | Jerome Brunet <> | Subject | [PATCH 04/14] clk: meson: move MESON_GATE to clk-regmap.h | Date | Mon, 28 Jan 2019 19:04:20 +0100 |
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Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- drivers/clk/meson/axg.c | 1 + drivers/clk/meson/clk-regmap.c | 5 +++++ drivers/clk/meson/clk-regmap.h | 15 +++++++++++++++ drivers/clk/meson/clkc.h | 15 --------------- 4 files changed, 21 insertions(+), 15 deletions(-)
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c index 1c6539eeee7c..474412234633 100644 --- a/drivers/clk/meson/axg.c +++ b/drivers/clk/meson/axg.c @@ -18,6 +18,7 @@ #include <linux/regmap.h> #include "clkc.h" +#include "clk-regmap.h" #include "axg.h" #define IN_PREFIX "ee-in-" diff --git a/drivers/clk/meson/clk-regmap.c b/drivers/clk/meson/clk-regmap.c index c515f67322a3..dcd1757cc5df 100644 --- a/drivers/clk/meson/clk-regmap.c +++ b/drivers/clk/meson/clk-regmap.c @@ -4,6 +4,7 @@ * Author: Jerome Brunet <jbrunet@baylibre.com> */ +#include <linux/module.h> #include "clk-regmap.h" static int clk_regmap_gate_endisable(struct clk_hw *hw, int enable) @@ -180,3 +181,7 @@ const struct clk_ops clk_regmap_mux_ro_ops = { .get_parent = clk_regmap_mux_get_parent, }; EXPORT_SYMBOL_GPL(clk_regmap_mux_ro_ops); + +MODULE_DESCRIPTION("Amlogic regmap backed clock driver"); +MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/clk/meson/clk-regmap.h b/drivers/clk/meson/clk-regmap.h index e9c5728d40eb..b7a085bbf072 100644 --- a/drivers/clk/meson/clk-regmap.h +++ b/drivers/clk/meson/clk-regmap.h @@ -111,4 +111,19 @@ clk_get_regmap_mux_data(struct clk_regmap *clk) extern const struct clk_ops clk_regmap_mux_ops; extern const struct clk_ops clk_regmap_mux_ro_ops; +#define MESON_GATE(_name, _reg, _bit) \ +struct clk_regmap _name = { \ + .data = &(struct clk_regmap_gate_data){ \ + .offset = (_reg), \ + .bit_idx = (_bit), \ + }, \ + .hw.init = &(struct clk_init_data) { \ + .name = #_name, \ + .ops = &clk_regmap_gate_ops, \ + .parent_names = (const char *[]){ "clk81" }, \ + .num_parents = 1, \ + .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \ + }, \ +} + #endif /* __CLK_REGMAP_H */ diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h index e3cd442db739..35768c2327ba 100644 --- a/drivers/clk/meson/clkc.h +++ b/drivers/clk/meson/clkc.h @@ -95,21 +95,6 @@ struct meson_vid_pll_div_data { struct parm sel; }; -#define MESON_GATE(_name, _reg, _bit) \ -struct clk_regmap _name = { \ - .data = &(struct clk_regmap_gate_data){ \ - .offset = (_reg), \ - .bit_idx = (_bit), \ - }, \ - .hw.init = &(struct clk_init_data) { \ - .name = #_name, \ - .ops = &clk_regmap_gate_ops, \ - .parent_names = (const char *[]){ "clk81" }, \ - .num_parents = 1, \ - .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \ - }, \ -}; - struct meson_clk_dualdiv_param { unsigned int n1; unsigned int n2; -- 2.20.1
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