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SubjectRe: [RFC PATCH] drm: disable WC optimization for cache coherent devices on non-x86
On Mon, Jan 21, 2019 at 05:30:00PM +0100, Ard Biesheuvel wrote:
> > Until that happens we should just change the driver ifdefs to default
> > the hacks to off and only enable them on setups where we 100%
> > positively know that they actually work. And document that fact
> > in big fat comments.
>
> Well, as I mentioned in my commit log as well, if we default to off
> unless CONFIG_X86, we may break working setups on MIPS and Power where
> the device is in fact non-cache coherent, and relies on this
> 'optimization' to get things working. The same could be true for
> non-coherent ARM systems, hence my approach to disable this hack for
> cache coherent devices on non-X86 only.

Do we break existing setups or just reduce performance due to the lack
of WC mappings? I thought it was the latter. The point is that
even your check won't do what you actually said. At lot of non-loongson
mips platforms are not cache coherent. As are a lot of arm setups
and all sparc64 ones for example. And chances that someone will
hacks this file out in a random subsystem when adding news ports also
is rather slim, so we'll remaing broken by default.

That is why I want at very least: a whitelist instead of a blacklist
and some very big comments explaining what is going on here. And in
the mid to long term even drm really needs to learn to use the
proper APIs :(

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