Messages in this thread Patch in this message | | | From | Srinath Mannam <> | Subject | [PATCH 3/3] PCI: iproc: Add PCIe 32bit outbound memory configuration | Date | Fri, 18 Jan 2019 09:53:23 +0530 |
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IPROC PCIe RC supports outbound memory mapping with SOC address inside 4GB address boundary, which is 32 bit AXI address. This patch add the support.
Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com> Signed-off-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com> --- drivers/pci/controller/pcie-iproc.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-iproc.c b/drivers/pci/controller/pcie-iproc.c index ee89d56..4d0e63b 100644 --- a/drivers/pci/controller/pcie-iproc.c +++ b/drivers/pci/controller/pcie-iproc.c @@ -982,8 +982,25 @@ static int iproc_pcie_setup_ob(struct iproc_pcie *pcie, u64 axi_addr, resource_size_t window_size = ob_map->window_sizes[size_idx] * SZ_1M; - if (size < window_size) - continue; + /* + * Keep iterating until we reach the last window and + * with the minimal window size at index zero. In this + * case, we take a compromise by mapping it using the + * minimum window size that can be supported + */ + if (size < window_size) { + if (size_idx > 0 || window_idx > 0) + continue; + + /* + * For the corner case of reaching the minimal + * window size that can be supported on the + * last window + */ + axi_addr = ALIGN_DOWN(axi_addr, window_size); + pci_addr = ALIGN_DOWN(pci_addr, window_size); + size = window_size; + } if (!IS_ALIGNED(axi_addr, window_size) || !IS_ALIGNED(pci_addr, window_size)) { -- 2.7.4
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