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SubjectRe: [PATCH 05/40] soc/tegra: pmc: Fix pad voltage configuration for Tegra186
On Wed, Aug 01, 2018 at 07:31:55PM +0300, Aapo Vienamo wrote:
> Implement support for the PMC_IMPL_E_33V_PWR register which replaces
> PMC_PWR_DET register interface of the SoC generations preceding
> Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
> table and the AO_HV pad.
>
> Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> Acked-by: Jon Hunter <jonathanh@nvidia.com>
> ---
> drivers/soc/tegra/pmc.c | 55 ++++++++++++++++++++++++++++++++++---------------
> include/soc/tegra/pmc.h | 1 +
> 2 files changed, 39 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
> index 2d6f3fc..f926332 100644
> --- a/drivers/soc/tegra/pmc.c
> +++ b/drivers/soc/tegra/pmc.c
> @@ -65,6 +65,8 @@
>
> #define PWRGATE_STATUS 0x38
>
> +#define PMC_IMPL_E_33V_PWR 0x40
> +
> #define PMC_PWR_DET 0x48
>
> #define PMC_SCRATCH0_MODE_RECOVERY BIT(31)
> @@ -154,6 +156,7 @@ struct tegra_pmc_soc {
> bool has_tsense_reset;
> bool has_gpu_clamps;
> bool needs_mbist_war;
> + bool has_impl_33v_pwr;
>
> const struct tegra_io_pad_soc *io_pads;
> unsigned int num_io_pads;
> @@ -1073,20 +1076,29 @@ int tegra_io_pad_set_voltage(enum tegra_io_pad id,
>
> mutex_lock(&pmc->powergates_lock);
>
> - /* write-enable PMC_PWR_DET_VALUE[pad->voltage] */
> - value = tegra_pmc_readl(PMC_PWR_DET);
> - value |= BIT(pad->voltage);
> - tegra_pmc_writel(value, PMC_PWR_DET);
> + if (pmc->soc->has_impl_33v_pwr) {
> + value = tegra_pmc_readl(PMC_IMPL_E_33V_PWR);
> + if (voltage == TEGRA_IO_PAD_1800000UV)
> + value &= ~BIT(pad->voltage);
> + else
> + value |= BIT(pad->voltage);

Nit: blank lines surrounding the if ... else ... block might improve
readability of this a little.

Thierry
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