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SubjectRe: [PATCH 2/8] mmc: tegra: Parse and program DQS trim value
Two more comments...

On Tue, Aug 07, 2018 at 04:59:58PM +0300, Aapo Vienamo wrote:
> Parse and program the HS400 DQS trim value from dt. Program a fallback
> value in case the property is missing.

"dt" -> "DT" because it is an abbreviation.

>
> Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> ---
> drivers/mmc/host/sdhci-tegra.c | 32 +++++++++++++++++++++++++++++---
> 1 file changed, 29 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
[...]
> @@ -545,20 +555,33 @@ static unsigned int tegra_sdhci_get_max_clock(struct sdhci_host *host)
> return clk_round_rate(pltfm_host->clk, UINT_MAX);
> }
>
> +static void tegra_sdhci_set_dqs_trim(struct sdhci_host *host, u8 val)
> +{
> + u32 reg;
> +
> + reg = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CAP_OVERRIDES);
> + reg &= ~SDHCI_TEGRA_CAP_OVERRIDES_DQS_TRIM_MASK;
> + reg |= val<<SDHCI_TEGRA_CAP_OVERRIDES_DQS_TRIM_SHIFT;

Also, you should add spaces around '<<'.

Thierry
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