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    Subject[PATCH v2 1/3] dt-bindings: soc: Add ZynqMP PM bindings
    Date
    From: Rajan Vaja <rajan.vaja@xilinx.com>

    Add documentation to describe Xilinx ZynqMP power management
    bindings.

    Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
    Signed-off-by: Jolly Shah <jollys@xilinx.com>
    ---
    .../bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt | 16 ++++++++++++++++
    1 file changed, 16 insertions(+)

    diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
    index d215d15..cb9a6b7 100644
    --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
    +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
    @@ -64,6 +64,17 @@ Output clocks are registered based on clock information received
    from firmware. Output clocks indexes are mentioned in
    include/dt-bindings/clock/xlnx,zynqmp-clk.h.

    +--------------------------------------------------------------------
    +Device Tree Bindings for the Xilinx Zynq MPSoC Power Management
    +--------------------------------------------------------------------
    +The zynqmp-power node describes the power management configurations.
    +It will control remote suspend/shutdown interfaces.
    +
    +Required properties:
    + - compatible: Must contain: "xlnx,zynqmp-power"
    + - interrupt-parent: Interrupt controller the interrupt is routed through
    + - interrupts: Interrupt specifier
    +
    -------
    Example
    -------
    @@ -78,5 +89,10 @@ firmware {
    clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, <&aux_ref_clk>, <&gt_crx_ref_clk>;
    clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk","aux_ref_clk", "gt_crx_ref_clk";
    };
    + zynqmp_power: zynqmp-power {
    + compatible = "xlnx,zynqmp-power";
    + interrupt-parent = <&gic>;
    + interrupts = <0 35 4>;
    + };
    };
    };
    --
    2.7.4
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