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Subject[PATCH v1 0/4] Add EDAC driver for QCOM SoCs
This series implements EDAC driver for QCOM SoCs. As of now, this driver
supports EDAC for Last Level Cache Controller (LLCC). LLCC EDAC driver is
to detect and report single and double bit errors on Last Level Cache
Controller (LLCC) cache. This driver also takes care of dumping registers
and also adding config options to enable and disable panic when these
errors happen in LLCC.

The driver functionality is implemented in:
qcom_edac.c : This platform driver registers to edac framework and
handles the single and double bit errors in cache by registering
interrupt handlers.

llcc-slice.c: It invokes the llcc edac driver and passes platform
data to it.

This patchset depends on the LLCC driver, which is yet to be merged.

Changes since v0:
* Added EDAC_QCOM config and updated the driver
* Addressed comments related to indentation and other minor ones

Channagoud Kadabi (1):
drivers: edac: Add EDAC driver support for QCOM SoCs

Venkata Narendra Kumar Gutta (3):
drivers: soc: Add broadcast base for Last Level Cache Controller
drivers: soc: Add support to register LLCC EDAC driver
dt-bindigs: Update documentation of qcom,llcc

.../devicetree/bindings/arm/msm/qcom,llcc.txt | 15 +-
drivers/edac/Kconfig | 28 ++
drivers/edac/Makefile | 1 +
drivers/edac/qcom_edac.c | 507 +++++++++++++++++++++
drivers/soc/qcom/llcc-slice.c | 73 ++-
include/linux/soc/qcom/llcc-qcom.h | 6 +-
7 files changed, 610 insertions(+), 27 deletions(-)
create mode 100644 drivers/edac/qcom_edac.c

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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