Messages in this thread | | | From | Andy Lutomirski <> | Date | Sat, 28 Jul 2018 21:21:41 -0700 | Subject | Re: [PATCH 06/10] mm,x86: skip cr4 and ldt reload when mm stays the same |
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On Sat, Jul 28, 2018 at 2:53 PM, Rik van Riel <riel@surriel.com> wrote: > When switching back from lazy TLB mode to a thread of the same process > that switched into lazy TLB mode, we still have the cr4 (and sometimes > LDT) of that process loaded, and there is no need to reload it. > > When there was no TLB flush while the CPU was in lazy TLB mode, the > current code in switch_mm_irqs_off already avoids the reload, by > returning early. > > However, when the TLB contents on the CPU are out of date, and we > flush the TLB for the task, we fall through to the regular context > switching code. This patch teaches that code to skip the cr4 and LDT > flushes when switching back to the same mm after a flush.
Acked-by: Andy Lutomirski <luto@kernel.org>
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