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    Subject[PATCH 4.9 14/66] bcm63xx_enet: do not write to random DMA channel on BCM6345
    Date
    4.9-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Jonas Gorski <jonas.gorski@gmail.com>

    commit d6213c1f2ad54a964b77471690264ed685718928 upstream.

    The DMA controller regs actually point to DMA channel 0, so the write to
    ENETDMA_CFG_REG will actually modify a random DMA channel.

    Since DMA controller registers do not exist on BCM6345, guard the write
    with the usual check for dma_has_sram.

    Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 ++-
    1 file changed, 2 insertions(+), 1 deletion(-)

    --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
    +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
    @@ -1063,7 +1063,8 @@ static int bcm_enet_open(struct net_devi
    val = enet_readl(priv, ENET_CTL_REG);
    val |= ENET_CTL_ENABLE_MASK;
    enet_writel(priv, val, ENET_CTL_REG);
    - enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
    + if (priv->dma_has_sram)
    + enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
    enet_dmac_writel(priv, priv->dma_chan_en_mask,
    ENETDMAC_CHANCFG, priv->rx_chan);


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