lkml.org 
[lkml]   [2018]   [Jul]   [11]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRE: [PATCH V2] MIPS: implement smp_cond_load_acquire() for Loongson-3
Date
From: Peter Zijlstra
> Sent: 11 July 2018 12:10
..
> Adding SYNC to WRITE_ONCE()/atomic* will hurt performance lots and will
> ultimately not guarantee anything more; and as Will said, keep you
> chasing dragons where people forgot to use WRITE_ONCE() where they maybe
> should've.

Also WRITE_ONCE() is there to solve an entirely different problem.
If you have a function that does:
<lots of code without any function calls>
foo->bar = 1;
the compiler is allowed to write other (unrelated) values
to foo->bar in the generated code for <lots of code>.

A long time ago I used a compiler that managed to convert:
if (foo->bar == 2)
foo->bar = 3;
into:
if (foo->bar == 2) {
foo->bar = 0;
foo->bar = 3;
}
When an interrupt read the value 0 a lot of linked list got screwed up.
WRITE_ONCE() is there to ensure that doesn't happen.
(In my case 'foo' was a 2-bit wide bitfield, and I suspect you
can't use WRITE_ONCE() on bitfields.)

David

\
 
 \ /
  Last update: 2018-07-11 13:45    [W:0.082 / U:5.196 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site