Messages in this thread | | | Date | Fri, 22 Jun 2018 18:54:16 +0100 | From | Marc Zyngier <> | Subject | Re: [PATCH 6/7] irqchip/gic-v3-its: Honor hypervisor enforced LPI range |
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Hi Shammer,
On Fri, 22 Jun 2018 17:31:40 +0100, Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com> wrote: > > Hi Marc, > > > -----Original Message----- > > From: Marc Zyngier [mailto:marc.zyngier@arm.com] > > Sent: 20 June 2018 14:53 > > To: linux-kernel@vger.kernel.org > > Cc: Thomas Gleixner <tglx@linutronix.de>; Ard Biesheuvel > > <ard.biesheuvel@linaro.org>; Shanker Donthineni > > <shankerd@codeaurora.org>; Shameerali Kolothum Thodi > > <shameerali.kolothum.thodi@huawei.com>; MaJun <majun258@huawei.com>; > > Laurentiu Tudor <laurentiu.tudor@nxp.com>; Lei Zhang > > <zhang.lei@jp.fujitsu.com> > > Subject: [PATCH 6/7] irqchip/gic-v3-its: Honor hypervisor enforced LPI range > > > > A recent extension to the GIC architecture allows a hypervisor to > > arbitrarily reduce the number of LPIs available to a guest, no > > matter what the GIC says about the valid range of IntIDs. > > > > Let's factor in this information when computing the number of > > available LPIs > > On our D05 board, this limits the lpis to 2 and results in MSI irq > alloc fails: > > [ 0.000000] ITS: Using hypervisor restricted LPI range [2] > .... > [ 10.543889] ixgbe 000a:11:00.1: Failed to allocate MSI interrupt, falling back to legacy. Error: -12 > > > Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> > > --- > > drivers/irqchip/irq-gic-v3-its.c | 9 +++++++++ > > include/linux/irqchip/arm-gic-v3.h | 1 + > > 2 files changed, 10 insertions(+) > > > > diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c > > index 8c7e8c235faf..903ca1c19553 100644 > > --- a/drivers/irqchip/irq-gic-v3-its.c > > +++ b/drivers/irqchip/irq-gic-v3-its.c > > @@ -1525,8 +1525,17 @@ static int free_lpi_range(u32 base, u32 nr_lpis) > > static int __init its_lpi_init(u32 id_bits) > > { > > u32 lpis = (1UL << id_bits) - 8192; > > + u32 numlpis; > > int err; > > > > + numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); > > + > > + if (numlpis > 1 && !WARN_ON(numlpis > lpis)) { > > + lpis = numlpis; > > + pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", > > + lpis); > > + } > > I don't have the GICv3 extension doc, but did you intent to check for, > > if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { > > as it looks like D05 returns 0 for bits 11-15 and that makes numlpis=2.
Absolutely. This really is a silly bug, thanks for catching that one. I've pushed out an update on my irq/lpi-allocator branch.
Thanks,
M.
-- Jazz is not dead, it just smell funny.
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